| GMT | Event |
|---|---|
| 14:00-15:00 | Keynote Talk (Chair: Reinhard von Hanxleden) |
| 14:00-15:00 | Towards a Theoretical Foundation for Real-Time Robotic Operating System (ROS) Nan Guan, City University of Hong Kong |
| 15:00-15:50 | Machine Learning (Chair: Lijun Zhang) |
| 15:00-15:25 | Real-Time Scheduling of Machine Learning Operations on Heterogeneous Neuromorphic SoC(Preprint) Anup Das |
| 15:25-15:50 | A Reinforcement-Learning Style Algorithm for Black Box Automata(Preprint) Doron Peled, Itay Cohen and Roi Fogler |
| 15:50-17:05 | Verification (Chair: Dominique Méry) |
| 15:50-16:15 | A novel approach to Real-time contract based reasoning for Hybrid Systems (Preprint) Surinder Sood, Avinash Malik and Partha Roop |
| 16:15-16:40 | Runtime Verification for Clinically Interpretable Arrhythmia Classification(Preprint) Alex Baird, Srinivas Pinisetty, Nathan Allen, Nitish Patel and Partha Roop |
| 16:40-17:05 | Reach-Avoid Verification for Time-varying Systems with Uncertain Disturbances(Preprint) Ruiqi Hu, Kairong Liu and Zhikun She |
| 17:05-17:55 | Cyber-Physical Systems (Chair: Jens Brandt) |
| 17:05-17:30 | Runtime Interchange of Enforcers for Adaptive Attacks: A Security Analysis Framework for Drones(Preprint) Alex Baird, Hammond Pearce, Srinivas Pinisetty and Partha Roop |
| 17:30-17:55 | Creating a Language for Writing Real-Time Applications for the Internet of Things(Preprint) Robert Krook, John Hui, Bo Joel Svensson, Stephen Edwards and Koen Claessen |
| GMT | Event |
|---|---|
| 14:00-15:00 | Keynote Talk (Chair: Jens Brandt) |
| 14:00-15:00 | Of JavaScript Ahead-Of-Time Compilation Performance Manuel Serrano, INRIA |
| 15:00-16:40 | HW Systems (Chair: Jens Brandt) |
| 15:00-15:25 | Deriving Pipeline Models for Timing Analysis from High-Level HDL Processor Designs(Preprint) Samira Ait Bensaid, Mihail Asavoae, Farhat Thabet and Mathieu Jan |
| 15:25-15:50 | ORIGAMI: Folding Data Structures to Reduce Timing Side-Channel Leakage(Preprint) Eric Rothstein-Morris, Jun Sun and Sudipta Chattopadhyay |
| 15:50-16:15 | Robust hardware-software Co-simulation framework for design and validation of Hybrid Systems(Preprint) Surinder Sood, Avinash Malik and Partha Roop |
| 16:15-16:40 | Towards Efficient Input Space Exploration for Falsification of Input Signal Class Augmented STL(Preprint) Vinayak Prabhu and Meetkumar Savaliya |
| 16:40-17:55 | Work-in-Progress (Chair: Dominique Méry) |
| 16:40-17:05 | Mechanization of a large DSML, an experiment with AADL and Coq(Preprint) Jerome Hugues, Lutz Wrage, John Hatcliff and Danielle Stewart |
| 17:05-17:30 | A small, but important, concurrency problem in Verilog’s semantics? (Work in progress)(Preprint) Andreas Lööw |
| 17:30-17:55 | Lifecycle-Based View on Cyber-Physical System Models Using Extended Hidden Markov Models(Preprint) Matthias Schaffeld, Rebecca Bernemann, Torben Weis, Barbara König and Viktor Matkovic |